Running Multiple Place and Route Passes on FPGAs

You can run multiple place and route passes to try to improve timing performance or, if the design is not completely routed, to search for a completely routed solution. The FPGA Multi-Pass Place & Route command scores each place and route pass and uses the score to determine the best passes to save. Scores are based on factors such as the number of unrouted nets, the delays on nets, and conformity to your timing constraints. The passes you save appear as implementation revisions in the Design Manager project view.

If you are working on a workstation, you can use the Nodelist File option to execute the place and route process on multiple machines. This significantly reduces the run time.

NOTE

The FPGA Multi-Pass Place & Route command is supported for the FPGA device families only.

To Run Multiple Place and Route Passes

1. In the Design Manager project view, select a design version icon.
   
   
2. Select Design FPGA Multi-Pass Place & Route.
   
   The FPGA Multi-Pass Place & Route Dialog Box appears, as shown in the “FPGA Multi-Pass Place & Route Dialog Box” figure of the “Menu Commands” chapter. The options in this dialog box are described in the “FPGA Multi-Pass Place & Route Dialog Box Options” section of the “Menu Commands” chapter.
   
   
3. Click the Select button to the right of the FPGA Part text field.
   
   The Part Selector appears, as shown in the “Part Selector Dialog Box” figure of the “Menu Commands” chapter.
   
   
4. Select the family, device, package, and speed grade.
   
   For a specific explanation of each option, see the “Part Selector Dialog Box Options” section of the “Menu Commands” chapter.
   
   
5. Click OK to set the part type.
   
   
6. In the FPGA Multi-Pass Place & Route dialog box, specify a placement initialization value in the Initial Placement Seed (Cost Table) field.
   
   The placement initialization value sets the number with which to begin the place and route attempts. Each pass receives an incremental value. The value you choose corresponds to a cost table index which initializes the place and route algorithms.
   
   
7. In the Place & Route Passes to Execute field, specify the number of place and route passes to attempt.
   
   
8. In the Save N Best Passes field, specify the number of place and route passes to save.
   
   The software saves the best passes based on the iteration design scores.
   
   
9. If you are working on a workstation, you can click the Nodelist File Browse button to choose a nodelist file that you generated.
   
   This file allows you to use multiple machine (nodes) that are networked together to run the place and route passes. For more information on generating a nodelist file and setting up environment variables, see the “Turns Engine (PAR Multi-Tasking Option)” section of the Development System Reference Guide.
   
   
10. Click Run.
    
    After the passes are complete, the FPGA Multi-Pass Place & Route Status dialog box appears, as shown in the “FPGA Multi-Pass Place & Route Status Dialog Box” figure of the “Menu Commands” chapter. Click View Log File to view the log file or click View Summary Report to view the summary report.
    
    The Design Manager creates implementation revisions for the number of passes you specified in the Save N Best Passes field.