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LDP_1

Transparent Data Latch with Asynchronous Preset and Inverted Gate

XC3000
XC4000E
XC4000X
XC5200
XC9000
Spartan
SpartanXL
Virtex
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Primitive

figures/x8376.gif

LDP_1 is a transparent data latch with asynchronous preset (PRE). When the PRE input is High, it overrides the other inputs and resets the data (Q) output High. Q reflects the data (D) input while gate (G) input and PRE are Low. The data on the D input during the Low-to-High gate transition is stored in the latch. The data on the Q output remains unchanged as long as G remains High.

The latch is asynchronously preset, output High, when power is applied. Virtex simulates power-on when global set/reset (GSR) is active. GSR defaults to active-High but can be inverted by adding an inverter in front of the GSR input of the STARTUP_VIRTEX symbol.

Inputs
Outputs
PRE
G
D
Q
1
X
X
1
0
0
0
0
0
0
1
1
0
1
X
No Chg
0

D
d
d = state of input one setup time prior to Low-to-High gate transition

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