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Chapter 8

Design Elements (OAND2 to OXOR2)

This chapter describes design elements included in the Unified Libraries. The elements are organized in alphanumeric order with all numeric suffixes in ascending order.

Information on the specific architectures supported by each of the following libraries is contained under the Applicable Architectures section of the Unified Libraries Chapter.


NOTE

Wherever XC4000 is mentioned, the information applies to all architectures supported by the XC4000E and XC4000X libraries.



NOTE

Wherever Spartans or Spartan series is mentioned, the information applies to all architectures supported by the Spartan and SpartanXL libraries.


Schematics are included for each library if the implementation differs. Design elements with bused or multiple I/O pins (2-, 4-, 8-, 16-bit versions) typically include just one schematic - generally the 8-bit version. When only one schematic is included, implementation of the smaller and larger elements differs only in the number of sections. In cases where an 8-bit version is very large, an appropriate smaller element serves as the schematic example.

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