This section contains information on the software required to perform the tutorial, how to set up your PC to use Workview Office and Xilinx Development System software, and how to install the tutorial.
You need the following versions of software to perform this tutorial.
Before beginning the tutorial, set up your PC to use Workview Office and Xilinx Development System software as follows.
set PATH=C:\XILINX\BIN\NT;C:\WVOFFICE;<rest_of_path>
set XILINX=C:\XILINX
set LM_LICENSE_FILE=C:\WVOFFICE\STANDARD\LICENSE.DAT,;C:\FLEXLM\LICENSE.DAT
This last variable points to the locations of both the Viewlogic license file and the Xilinx license file. A comma and semicolon (,;) separate the two paths instead of just a semicolon (;). Workview Office 7.31 and older versions require this. Workview Office 7.4 and newer versions require only the semicolon (;).
C:\XILINX is the directory where all Xilinx software resides. You can find the Xilinx-Viewlogic software, including libraries, under this directory tree.
C:\WVOFFICE is the directory where all Viewlogic software resides.
Path names of directories vary. For more information about paths and environment variables, refer to the release notes that came with your software package.
Make sure that the following Viewlogic-specific variable is set correctly.
set WDIR=C:\WVOFFICE\STANDARD
This variable points in the Viewlogic software tree.
The tutorial files install optionally when you install the Viewlogic Interface software. If you have already installed the software, but do not know if the tutorial installed, check for a tutorial directory under your c:\xilinx\viewlog directory. The tutorial directory contains the tutorial files.
When you create a design object in Viewlogic, three directories are created in the project directory with the names SCH, SYM, and WIR. These directories contains schematic files, symbol files, and wire files respectively. They all have .1 extensions, with the exception of multi-sheet schematics, whose extension matches the sheet number of the schematic. For example, if you create a schematic named calc, Viewlogic creates an SCH directory that contains a file called calc.1. When you check this schematic, Viewlogic creates the wire file calc.1 in the WIR directory.
In this tutorial, file names and directory names are in lower case and the design example is referred to as Calc.
You complete the Calc design in this tutorial. During the tutorial installation, the c:\xilinx\viewlog\tutorial directory is created; and the tutorial files needed to complete the design are copied to the calc_vl directory. Some of the files you need to complete the tutorial design do not copy because you create these files in the tutorial. However, solutions directories with all input and output files are provided. They reside in the c:\xilinx\viewlog\tutorial\calc directory and are listed in the table that follows.
| Directory | Description |
|---|---|
| calc_vl | Schematic tutorial directory |
| calc_4ke | Schematic solution directory for XC4003E-PC84 |
| calc_9k | Schematic solution directory for XC95xxx-PC84 |
| calc_blx | Schematic solution using LogiBLOX with calc_4ke |
The solutions directories contain the design files for the completed tutorial, including schematics and the bitstream file. To conserve disk space, some intermediate files are not provided, except in the calc_4ke directory, which is complete. Different device families require different intermediate files. Do not overwrite any files in the solutions directories.
The calc_vl directory contains the incomplete copy of the tutorial design. The installation program copies a few intermediate files to the calc_vl tutorial directory, and you create the remaining files when you perform the tutorial. As described in a later step, you copy the calc_vl directory to another area and perform the tutorial in this new area. The following table lists and describes the directories and files in the calc_4ke solution directory.
| Directory or File Name | Description |
|---|---|
| calc | Top-level design directory |
| control | Design directory for control module |
| statmach | Design directory for state controller module |
| alu | Design directory for ALU module |
| alu_blox | LogiBLOX version of ALU design component (see “LogiBLOX Tutorial”) |
| muxblk2 | Design component for arithmetic function in ALU |
| andblk2 | Design component for arithmetic function in ALU |
| orblk2 | Design component for arithmetic function in ALU |
| xorblk2 | Design component for arithmetic function in ALU |
| muxblk5 | Design component for multiplexer arithmetic outputs in ALU |
| muxlbk2a | Design component for multiplexer operator function in control |
| stack | Design component for stack |
| seg7dec | Design component for 7-segment decoder |
| debounce | Design component for debounce circuit |
| osc_3k | Design component interface to RC circuit on demonstration boards; generates clock |
| calc.edn | EDIF netlist files created by EDIFNETO |
| calc.ngo | Netlist Gate-level Object created by EDIF2NGD |
| calc_4ke.ucf | User Constraints File |
| calc.ngd | Netlist Gate-level Design created by NGDBUILD |
| calc.mrp | Mapping report created by MAP |
| calc.pcf | Physical Constraints File created by MAP |
| calc.ncd | Netlist for Configurable Devices created by MAP |
| calc_r.ncd | Routed NCD file created by PAR |
| calc_r.twr | Timing report created by Trace (TRCE) |
| calc_4kf.cmd | Functional simulation command file |
| calc_4kt.cmd | Timing simulation command file |
This directory also contains a default viewdraw.ini file. This assumes a default installation directory for the Viewlogic libraries. You can import this file into the Project Manager to help set up the proper libraries for your project.
