This chapter explains the basic operations used to create state machine designs.
State machine design typically starts with the translation of a concept into a “paper design,” usually in the form of a state diagram or a bubble diagram. The paper design is converted to a state table and, finally, into the source code itself. To illustrate the process of developing state machines, this chapter discusses an example in which a state machine repetitively sequences through the five numbers 9, 5, 1, 2, and 4.
This chapter contains the following sections.
Refer to the “State Machine Designs” section of the “Design Methodologies - Schematic Flow” chapter for a detailed procedure on creating a state machine design. For an example of how to create a state machine, refer to the in-depth tutorial in the Foundation Series Quick Start Guide 1.5.
For additional information, select Help 
Foundation Help Contents. Click State Editor under Tools or The State Editor under Tutorials in the Xilinx Foundation Series On-Line Help System menu.
For information on creating state machine macros, refer to the “Schematic Designs With Finite State Machine (FSM) Macros” section of the “Design Methodologies - Schematic Flow” chapter and to the “HDL Designs with State Machines” section of the “Design Methodologies - HDL Flow” chapter.
