The NGD file produced when a design netlist is read into the Xilinx Development System may contain a number of logical constraints. These constraints originate in any of these sources.
Logical constraints in the NGD file are read by MAP. MAP uses some of the constraints to map the design, and converts other logical constraints to physical constraints. MAP then writes these physical constraints into a Physical Constraints File (PCF).
The PCF file is an ASCII file containing two separate sections: a section for those physical constraints created by the mapper and a section for physical constraints entered by the user. The mapper section is rewritten every time you run the mapper. Mapper-generated physical constraints appear first in the file, followed by user physical constraints. This order dictates that in the event of conflicts between mapper-generated and user constraints, user constraints are last-read and override. The mapper-generated section of the file is preceded by a SCHEMATIC START notation on a separate line.
The end of this section is indicated by SCHEMATIC END, also on a separate line. User-generated constraints, such as timing constraints, should always be entered after SCHEMATIC END.
You can write user constraints directly into the file or you can write them indirectly (or undo them) from within the FPGA Editor. (For more information on constraints in the FPGA Editor, see the Using the FPGA Editor chapter in the FPGA Editor Guide).
The PCF file is an optional input to PAR, the FPGA Editor, TRACE, NGDAnno, and BitGen (see the following figure).
The file may contain any number of constraints and any number of comments in any order. A comment consists of either a pound sign (#) or double slashes (//) followed by any number of other characters up to a new line. Illegal constraints are automatically commented out by the program.