Return to previous page Advance to next page
Libraries Guide
Chapter 3: Design Elements (ACC1 to BYPOSC)

BUFGLS

Global Low Skew Clock Buffer

XC3000
XC4000E
XC4000X
XC5200
XC9000
Spartan
SpartanXL
Spartan2
Virtex
N/A
N/A
Primitive
N/A
N/A
N/A
Primitive
N/A
N/A

Each corner of the XC4000X or SpartanXL device has two Global Low-Skew buffers (BUFGLS). Any of the eight buffers can drive any of the eight vertical global lines in a column of CLBs. In addition, any of the buffers can drive any of the four vertical lines accessing the IOBs on the left edge of the device and any of the eight vertical lines accessing the IOBs on the right edge of the device.

IOBs at the top and bottom edges of the device are accessed through the vertical global lines in the CLB array. Any global low-skew buffer can, therefore, access every IOB and CLB in the device.

The global low-skew buffers can be driven by either semi-dedicated pads or internal logic.