DECODE4, 8, 16

4-, 8-, 16-Bit Active-Low Decoders

Figure 4.60 DECODE Representations

In the XC4000 architectures, decoders are open-drain, wired-AND gates. When one or more of the inputs (A) are Low, output (O) is Low. When all the inputs are High, the output is High or Off. A pull-up resistor must be connected to the output node to achieve a true logic High. A double pull-up resistor can be used to achieve faster performance; however, it uses more power. The software implements these macros using the open-drain AND gates around the periphery of the devices. (Diamonds in library symbols indicate an open-drain output.)

In XC5200, decoders are implemented by cascading CY_MUX elements driven by lookup tables (LUTs). When one or more of the inputs are Low, the output is Low. When all the inputs are High, the output is High. You can decode patterns by adding inverters to inputs. Pull-ups cannot be used on XC5200 longlines.

In Virtex and Spartan2, decoders are implemented using combinations of LUTs and MUXCYs.

Figure 4.61 DECODE8 Implementation XC4000E, XC4000X

Figure 4.62 DECODE8 Implementation XC5200

Figure 4.63 DECODE8 Implementation Spartan2, Virtex