Libraries GuideChapter 8: Design Elements (OAND2 to OXOR2)
OSC52
Internal Multiple-Frequency Clock-Signal Generator
XC3000
| XC4000E
| XC4000X
| XC5200
| XC9000
| Spartan
| SpartanXL
| Spartan2
| Virtex
|
|---|
N/A
| N/A
| N/A
| Primitive
| N/A
| N/A
| N/A
| N/A
| N/A
|
OSC52 provides internal clock signals in applications where timing is not critical. The available frequencies are determined by FPGA device components, which are process independent. Therefore, the available frequencies vary from device to device. Only one OSC52 may be used per design.
The oscillator frequencies of the OSC1 and OSC2 outputs are determined by specifying theDIVIDE1_BY=n1 attribute for the OSC1 output and DIVIDE2_BY=n2 attribute for the OSC2 output. n1 and n2 are integer numbers by which internal 16-MHz clock is divided to produce the desired clock frequency. The available frequency options appear in the table that follows.
n1
| OSC1 Frequency
| n2
| OSC2 Frequency
|
|---|
4
| 4 MHz
| 2
| 8 MHz
|
16
| 1 MHz
| 8
| 2 MHz
|
64
| 250 kHz
| 32
| 500 kHz
|
256
| 63 kHz
| 128
| 125 kHz
|
|
| 1,024
| 16 kHz
|
|
| 4,096
| 4 kHz
|
|
| 16,384
| 1 kHz
|
|
| 65,536
| 244 Hz
|
