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Libraries Guide
Chapter 9: Design Elements (PULLDOWN to ROM32X1)

RAM32X2

32-Deep by 2-Wide Static RAM

XC3000
XC4000E
XC4000X
XC5200
XC9000
Spartan
SpartanXL
Spartan2
Virtex
N/A
Macro
Macro
N/A
N/A
N/A
N/A
N/A
N/A

RAM32X2 is a 32-word by 2-bit static read-write random access memory. When the write enable (WE) is High, the data on the data inputs (D1 - D0) is loaded into the word selected by the address bits (A4 - A0). The data outputs (O1 - O0) reflect the selected (addressed) word, whether WE is High or Low. When WE is Low, the RAM content is unaffected by address or input data transitions. Address inputs must be stable before the High-to- Low WE transition for predictable performance.

The initial contents of RAM32X2 cannot be specified directly. Initial contents may be specified only for RAMs that are 1-bit wide and 16 or 32 bits deep. See “Specifying Initial Contents of a RAM” in the “RAM16X1” section.

Mode selection is shown in the following truth table.

Inputs
Outputs
WE(mode)
D1 - D0
O1 - O0
0(read)
X
Data
1(write)
D1 - D0
Data
Data = word addressed by bits A4 - A0