DRC Types

Physical DRC can perform four types of checks.

• Net check - examines one or more routed or unrouted signals and reports any problems with pin counts, tristate buffer inconsistencies, floating segments, antennae, and partial routes.
  
  
• Block check - examines one or more placed or unplaced components and reports any problems with logic, physical pin connections, or programming.
  
  
• Chip check - examines a special class of checks for signals, components, or both at the chip level, such as placement rules with respect to one side of the device, etc.
  
  
• All checks - performs net, block, and chip checks.
  
  

When you run DRC from the command line (as described in the previous sections), it automatically performs net, block, and chip checks.

In the FPGA Editor, you can run the net check on selected objects or on all of the signals in the design. Similarly, the block check can be performed on selected components or on all of the design's components. When you check all components in the design, the block check performs extra tests on the design as a whole (for example, tristate buffers sharing long lines and oscillator circuitry configured correctly) in addition to checking the individual components. In the FPGA Editor, you can run the net check and block check separately or together.

For a description of how the DRC works within the FPGA Editor, see the “Physical Design Rule Check (DRC)” section in the FPGA Editor Guide.