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An NCD (Native Circuit Description) file contains a physical description of your design in terms of the components in the target architecture. NCDRead enables you to quickly generate an ASCII (text) file based on the data found in one or more NCD files.
To start NCDRead from the UNIX or DOS command line, type the following.
ncdread [-o outfile_name] filename0.ncd {filename1.ncd ...}
Note: Standard output goes only to your screen if you do not use the -o option to write the output to a file.
Following is an example of an output file from NCDRead. The example gives information on three of the components in the design. An actual file includes information on all the components.
Loading device database for application ncread from file "testclk.ncd"."testclk" is an NCD, version 2.28, device xcv100, package bg256, speed -4
Loading device for application ncread from file 'v100.nph' in environment
/build/bcxfndry/C.13/rtf.
NC_DESIGN <testclk> - version 2.28
vendor = Xilinx, package = bg256, speed = -4
72 comps
NC_BEL:5 - <C253> ngdid = 5
cmprim = <lut-or-mem>
comp = <core_inst/counter2/cont<3>>, cmid = 48
signals on pin:
A1 - core_inst/counter2/C54/N32
A2 - core_inst/counter2/N356
A3 - syn2748
D - core_inst/counter2/C65/N19
bel config info:
Inverted pins:
clkedge=CM_CLKRISING
O=(~I0*I1*~I2)+(~I0*I1*I2)+(I0*I1*I2)
lutmode is EQN_MODE_LUT
clk_is_inverted=FALSE,shift_register=FALSE
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NC_BEL:7 - <core_inst/counter2/cont_reg<3>> ngdid = 5
cmprim = <latch-or-ff>
comp = <core_inst/counter2/cont<3>>, cmid = 73
signals on pin:
CK - ck2
D - core_inst/counter2/C65/N19
Q - core_inst/counter2/cont<3>
INIT - core_inst/counter1/n224
bel config info :
Inverted pins:
clkedge=CM_CLKRISING
clkinvert=FALSE,resetmode=TRUE resetedge=CM_SRFALLING
resetinvert=FALSE
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NC_COMP:3 - <core_inst/counter2/cont<3>> ngid = 5, external = 0
siteparam:10, site:-1, l2pmap:-1, macro:-1
Config String: <CYSELF:#OFF CYSELG:#OFF CKINV:1 COUTUSED:#OFF
YUSED:#OFF XUSED:#OFF XBUSED:#OFF F5USED:#OFF YBMUX:#OFF CYINIT:#OFF DYMUX:1 DXMUX:1 CY0F:#OFF CY0G:#OFF F:#LUT:D=(~A1*A2*~A3)+(~A1*A2*A3)+(A1*A2*A3) G:#LUT:D=(~A1*A2*~A3)+(~A1*A2*A3)+(A1*A2*A3) RAMCONFIG:#OFF
REVUSED:#OFF BYMUX:#OFF BXMUX:#OFF CEMUX:#OFF SRMUX:SR GYMUX:GFXMUX:F SYNC_ATTR:ASYNC SRFFMUX:0 INITY:LOW FFX:#FF FFY:#FF INITX:LOW>
There are <10> paths.
17: [f:12] 8 pins F1:F1 F:A1 F:D FXMUX:F FXMUX:OUT DXMUX:1 DXMUX:OUT FFX:D Container (1): 18
43: [f:12] 8 pins F2:F2 F:A2 F:D FXMUX:F FXMUX:OUT DXMUX:1 DXMUX:OUT FFX:D
Container (1): 44
69: [f:12] 8 pins F3:F3 F:A3 F:D FXMUX:F FXMUX:OUT DXMUX:1 DXMUX:OUT FFX:
Container (1): 70
89: [f:12] 8 pins G1:G1 G:A1 G:D GYMUX:G GYMUX:OUT DYMUX:1 DYMUX:OUT FFY:D
Container (1): 90
107: [f:12] 8 pins G2:G2 G:A2 G:D GYMUX:G GYMUX:OUT DYMUX:1 DYMUX:OUT FFY:D
Container (1): 108
123: [f:12] 8 pins G3:G3 G:A3 G:D GYMUX:G GYMUX:OUT DYMUX:1 DYMUX:OUT FFY:D
Container (1): 124
531: [f:8] 6 pins CLK:CLK CKINV:1 CKINV:OUT FFX:CK FFX:Q XQ:XQ
532: [f:8] 6 pins CLK:CLK CKINV:1 CKINV:OUT FFY:CK FFY:Q YQ:YQ
569: [f:8] 8 pins SR:SR SRMUX:SR SRMUX:OUT SRFFMUX:0 SRFFMUX:OUT FFX:INIT
FFX:Q XQ:XQ
570: [f:8] 8 pins SR:SR SRMUX:SR SRMUX:OUT SRFFMUX:0 SRFFMUX:OUT FFY:INIT
FFY:Q YQ:YQ
There are <26> delays.
Pin Types:
Real_pin=<00> pintype=<0x10,16>
Real_pin=<01> pintype=<0x10,16>
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