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Libraries Guide
Chapter 12: Attributes, Constraints, and Carry Logic

Relationally Placed Macros (RPMs)

The Xilinx libraries contain three types of elements.

The last item mentioned above, RPMs, applies only to FPGA families.

The relationally placed macro (RPM) library uses RLOC constraints to define the order and structure of the underlying design primitives. Because these macros are built upon standard schematic parts, they do not have to be translated before simulation. The components that are implemented as RPMs are listed in the “Relationally Placed Macros” section of the “Selection Guide” chapter.

Designs created with RPMs can be functionally simulated. RPMs can, but need not, include all the following elements.

The RPM library offers the functionality and precision of the hard macro library with added flexibility. You can optimize RPMs and merge other logic within them. The elements in the RPM library allow you to access carry logic easily and to control mapping and block placement. Because RPMs are a superset of ordinary macros, you can design them in the normal design entry environment. They can include any primitive logic. The macro logic is fully visible to you and can be easily back-annotated with timing information.