COMPMC8, 16

8-, 16-Bit Magnitude Comparators

COMPMC8 is an 8-bit, magnitude comparator that compares two positive binary-weighted words A7 - A0 and B7 - B0, where A7 and B7 are the most significant bits. COMPMC16 is a 16-bit, magnitude comparator that compares two positive binary-weighted words A15 - A0 and B15 - B0, where A15 and B15 are the most significant bits.

These comparators are implemented using carry logic with relative location constraints to ensure efficient logic placement.

The greater-than output (GT) is High when A>B, and the less-than output (LT) is High when A<B. When the two words are equal, both GT and LT are Low. Equality can be flagged with this macro by connecting both outputs to a NOR gate.

Table 4_12 COMPMC8 Truth Table (also representative of COMPMC16)

Topology for XC4000, Spartan, SpartanXL

This is the COMPMC8 (8-bit) and COMPMC16 (16-bit) topology for XC4000E, XC4000X, Spartan, and SpartanXL devices.

In the process of combining the logic that loads GT and LT, the place and route software might map the logic that generates GT and LT to different function generators. If this mapping occurs, the GT and LT logic cannot be placed in the uppermost CLB, as indicated in the illustration.

Figure 4.46 COMPMC8 Implementation XC4000E, XC4000X, Spartan, SpartanXL

Figure 4.47 COMPMC8 Implementation XC5200

Figure 4.48 COMPMC8 Implementation Spartan2, Virtex