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| Element | XC3000 | XC4000E | XC4000X | XC5200 | XC9000 | Spartan | SpartanXL | Spartan2 | Virtex |
|---|---|---|---|---|---|---|---|---|---|
| NAND2, NAND2B1, NAND2B2, NAND3, NAND3B1, NAND3B2, NAND3B3, NAND4, NAND4B1, NAND4B2, NAND4B3, NAND4B4 | Primitive | Primitive | Primitive | Primitive | Primitive | Primitive | Primitive | Primitive | Primitive |
| NAND5, NAND5B1, NAND5B2, NAND5B3, NAND5B4, NAND5B5 | Primitive | Primitive | Primitive | Macro | Primitive | Primitive | Primitive | Primitive | Primitive |
| NAND6, NAND7, NAND8, NAND9 | Macro | Macro | Macro | Macro | Primitive | Macro | Macro | Macro | Macro |
Figure 7.25 NAND Gate RepresentationsThe NAND function is performed in the Configurable Logic Block (CLB) function generators for XC3000, XC4000, XC5200, Spartan, and SpartanXL. NAND gates of up to five inputs are available in any combination of inverting and non-inverting inputs. NAND gates of six to nine inputs are available with only non-inverting inputs. To invert inputs, use external inverters. Since each input uses a CLB resource, replace gates with unused inputs with gates having the necessary number of inputs.
Refer to the “NAND12, 16” section for information on additional NAND functions for the XC5200, Spartan2, and Virtex.
Figure 7.26 NAND5 Implementation XC5200Figure 7.27 NAND8 Implementation XC3000Figure 7.28 NAND8 Implementation XC4000E, XC4000X, Spartan, SpartanXLFigure 7.29 NAND8 Implementation XC5200Figure 7.30 NAND8 Implementation Spartan2, Virtex