Chapter 2

Design Flow

This chapter describes the process for creating, implementing, verifying, and downloading designs for FPGA and CPLD devices. For a complete description of FPGAs and CPLDs, refer to The Programmable Logic Data Book.

This chapter contains the following sections.

• “Overview”
  
  
• “Design Entry”
  
  
• “Design Implementation”
  
  
• “FPGA Editor”
  
  
• “FPGA Design Techniques”
  
  
• “Design Verification”