Overview

The purpose of XFLOW is to provide a mechanism for users to encapsulate the Xilinx implementation or simulation flows within their own tools. These user tools might be simple scripts or they might be company frameworks.

XFLOW is a command line tool that allows you to run the full suite of Xilinx implementation and simulation flows. To run, XFLOW reads a design file, flow file, and option files as inputs. The flow file specifies the sequence of Xilinx tools to run on a design. The option file specifies the command line options for all the tools listed in the flow file. Xilinx has provided six option files for implementation - three each for FPGAs and CPLDs and numerous option files for simulation. See the “Option Files” section for a list of these files. Xilinx has also provided three flow files to perform some basic implementation sequences. See the “Flow Files” section for a list.

If you run XFLOW on a design for the first time, XFLOW searches through the hierarchy and copies the corresponding flow and option files into your working directory. For later runs with the same command line options, XFLOW searches through your install hierarchy (or tree) and copies the flow files and option files. The hierarchical search is as follows:

• Current working directory (First)
  
  
• Directories specified with the XFLOWPATH environment variable. This variable is used to define implementations for project-based, team-based, or company-wide settings. For example, consider a project team working on a design. If a project team has decided on the flow file and options file to use, the team can keep these files in a central repository pointed to by the XFLOWPATH environment variable. The variable ensures that the team members will run the same flow with the predetermined options which avoids inconsistencies.
  
  
• User-defined area specified by the MYXILINX environment variable
  
  
• Installed area specified with the XILINX environment variable (Last)
  
  

If the design is an FPGA and you are using the -implement, -tsim, or
-config flow types, the default flow file is fpga.flw. If the design is a CPLD and you are using the -fit or -tsim options, the default file is cpld.flw. If you are running a functional simulation for either an FPGA or CPLD using the -fsim flow type, the default flow file is fsim.flw.

XFLOW executes the programs in the order specified in the flow file. It checks the options file to find the corresponding options for each program in the flow file.

Figure 22.1 XFLOW