Libraries Guide

About This Manual

This manual describes Xilinx's Unified Libraries and the attributes and constraints that can be used with the components.

Before using this manual, you should be familiar with the operations that are common to all Xilinx software tools: how to bring up the system, select a tool for use, specify operations, and manage design data. These topics are covered in the Quick Start Guide.

Additional Resources

For additional information, go to http://support.xilinx.com. The following table lists some of the resources you can access from this page. You can also directly access some of these resources using the provided URLs.

Resource	Description/URL
Tutorial	Tutorials covering Xilinx design flows, from design entry to verification and debugging http://support.xilinx.com/support/techsup/tutorials/index.htm
Answers Database	Current listing of solution records for the Xilinx software tools Search this database using the search function at http://support.xilinx.com/support/searchtd.htm
Application Notes	Descriptions of device-specific design techniques and approaches http://support.xilinx.com/apps/appsweb.htm
Data Book	Pages from The Programmable Logic Data Book, which describe device-specific information on Xilinx device characteristics, including readback, boundary scan, configuration, length count, and debugging http://support.xilinx.com/partinfo/databook.htm
Xcell Journals	Quarterly journals for Xilinx programmable logic users http://support.xilinx.com/xcell/xcell.htm
Tech Tips	Latest news, design tips, and patch information on the Xilinx design environment http://support.xilinx.com/support/techsup/journals/index.htm

Manual Contents

This manual contains the following chapters.

Chapter 1, “Xilinx Unified Libraries”
Chapter 2, “Selection Guide”
Chapter 3, “Design Elements (ACC1 to BYPOSC)”
Chapter 4, “Design Elements (CAPTURE_SPARTAN2 to DECODE64)”
Chapter 5, “Design Elements (F5MAP to FTSRLE)”
Chapter 6, “Design Elements (GCLK to KEEPER)”
Chapter 7, “Design Elements (LD to NOR16)”
Chapter 8, “Design Elements (OAND2 to OXOR2)”
Chapter 9, “Design Elements (PULLDOWN to ROM32X1)”
Chapter 10, “Design Elements (SOP3 to XORCY_L)”
Chapter 11, “Design Elements (X74_42 to X74_521)”
Chapter 12, “Attributes, Constraints, and Carry Logic”

Chapter 1, ”Xilinx Unified Libraries,” discusses the unified libraries, applicable device architectures for each library, contents of the other chapters, general naming conventions, and performance issues.

Chapter 2, “Selection Guide,” describes then lists design elements by function that are explained in detail in the “Design Elements” chapters.

Chapters 3 through 11, “Design Elements,” provide a graphic symbol, functional description, primitive versus macro table, truth table (when applicable), topology (when applicable), and schematics for macros of the design elements.

Chapter 12, “Attributes, Constraints, and Carry Logic,” provides information on all attributes, logical constraints, placement and timing constraints, relationally placed macros (RPMs), and carry logic.

Conventions

This manual uses the following typographical and online document conventions. An example illustrates each typographical convention.

Typographical

The following conventions are used for all documents.

Courier font indicates messages, prompts, and program files that the system displays.

speed grade: -100
Courier bold indicates literal commands that you enter in a syntactical statement. However, braces “{ }” in Courier bold are not literal and square brackets “[ ]” in Courier bold are literal only in the case of bus specifications, such as bus [7:0].

rpt_del_net=

Courier bold also indicates commands that you select from a menu.

File Open
Italic font denotes the following items.
- Variables in a syntax statement for which you must supply values
  
  edif2ngd design_name
- References to other manuals
  
  See the Development System Reference Guide for more information.
- Emphasis in text
  
  If a wire is drawn so that it overlaps the pin of a symbol, the two nets are not connected.
Square brackets “[ ]” indicate an optional entry or parameter. However, in bus specifications, such as bus [7:0], they are required.

edif2ngd [option_name] design_name
Braces “{ }” enclose a list of items from which you must choose one or more.

lowpwr ={on|off}
A vertical bar “|” separates items in a list of choices.

lowpwr ={on|off}
A vertical ellipsis indicates repetitive material that has been omitted.

IOB #1: Name = QOUT' IOB #2: Name = CLKIN' . . .
A horizontal ellipsis “. . .” indicates that an item can be repeated one or more times.

allow block block_name loc1 loc2 ... locn;

Online Document

The following conventions are used for online documents.

Red-underlined text indicates an interbook link, which is a cross-reference to another book. Click the red-underlined text to open the specified cross-reference.
Blue-underlined text indicates an intrabook link, which is a cross-reference within a book. Click the blue-underlined text to open the specified cross-reference.

Note: The preceding conventions do not apply to the links in the Adobe Acrobat versions of the books.