FPGA Editor GuideChapter 3: Using the FPGA Editor
Routing and Unrouting
All or selected connections can be routed in the Array window automatically or manually. When you use automatic routing, the system selects the routing path for each connection you select. In manual routing, you specify the routing path.
You can enable the Automatic Routing option to automatically route any unrouted net pins created as a result of an editing action, such as placing a component or creating a new net. Automatic Routing, when enabled, occurs after add, place, autoplace, and swap operations.
You can also unroute connections. Unrouting removes the routing from any specified routes without eliminating the logical connections of the nets.
This section contains the following topics.
Automatic Routing
Use the AutoRoute command to automatically route selected design objects, including the following.
- Nets
- Net pins
- Ratsnest lines
- Components
- Macros
In addition, you can autoroute between two resources including the following.
- Route segments
- Used wires
- Used or unused component pins
Note: If both resources are used, they must be on the same net.
To automatically route selected objects, follow these steps.
- Select the objects you want to automatically route.
You can select any combination of nets, net pins, ratsnest lines and components and macros. Net pins, ratsnest lines, components, macros, and partially or fully routed nets in the Array window. Unrouted nets can only be selected in the List window.
- Select Tools Route Auto Route.
The objects you selected are routed (if possible). The display for each routed connection changes from a ratsnest display to a routed net display. If an object could not be completely routed, an error message appears in the history area and the ratsnest remains.
Notes on Automatically Routing Selected Objects
This section includes additional information on automatically routing selected objects.
- When an output pin (a net driver) is automatically routed, the entire net is routed. When an input pin (a net load) is automatically routed, the connection between the pin and the net driver is routed.
- When a component is automatically routed, each net pin on the component is routed.
- When a net or a ratsnest line is automatically routed, the entire net is routed.
- Delay-based autorouting uses delay values when routing your design. If this type of autorouting is disabled, cost-based autorouting is performed instead. Delay-based autorouting takes longer, but can result in better routing, especially in a dense design. By default, delay-based autorouting is enabled; this option has no effect when you autoroute all nets.
- When selected objects are autorouted in the FPGA Editor, existing routing is not unrouted and rerouted to accommodate new routing. Also, component pins are not swapped for a better routing. Because the PAR program unroutes routes and swaps pins if necessary, routing with PAR is more efficient than routing in the FPGA Editor.
- You can select and then autoroute two objects on a single net. The two objects can be any combination of a net pin, a route segment, a local line, a long line, or a pinwire used by the net. The Autoroute command attempts to route a path between the two selected objects.
If you do not want the pin to be routed with the vertical local line selected by the software, you can specify a different path for the route by selecting the pin and the horizontal local line already used for the net routing.
To automatically route your entire design use the following procedure.
- Select Tools Route Auto Route All.
The Autoroute All Nets dialog box appears, as shown in the Autoroute All Nets Dialog Box figure of the Menu Commands chapter.
The fields in this dialog box are described in the Autoroute All Nets Dialog Box Options section of the Menu Commands chapter.
- Specify the routing options you want and click OK to close the dialog box.
All unrouted connections are routed if possible. The display for each routed connection changes from a ratsnest display to a routed net display. If a net cannot be routed to completion, an error message appears in the history area.
Notes on Automatically Routing the Entire Design
This section includes additional information on automatically routing your entire design.
- When your entire design is automatically routed, the following default routing options are performed.
- Three iterations of the router
- One cost-based cleanup pass
- No delay-based cleanup passes
- To specify the number of routing iterations instead of accepting the default value (3), enter a different value in the Number of Passes field in the Autoroute All Nets dialog box. The number (1 to 999) specifies the maximum number of iterations performed. The router continues to perform iterations until one of the following events occurs.
- Your design is routed to completion and constraints are met.
- The router completes the number of iterations you specified.
- The router cannot route your design to completion or meet constraints.
- When your entire design is routed, existing routing is not unrouted and rerouted to accommodate new routing. Because the PAR program unroutes routes and swaps pins if necessary, routing with PAR is more efficient than routing in the FPGA Editor.
Manual Routing
Use the Route command to manually route your design. Manual routing allows you to specify the path for the signal routing. Select the net pins or pinwires to connect and the routing resources to use, for example, long lines or local lines, and the system routes the specified path. As part of the manual routing, you can select unused pins on placed components and then route these pins together to form a new net, or route them to an existing net.
To manually route your design, follow these steps.
- Select the net pins, pinwires, local lines, long lines, route segments, and unused components pins.
- Select Tools Route Manual Route.
The selected objects are routed in the specified order.
Notes on Manual Routing
This section includes additional information on manually routing your design.
- Selected objects must be part of the same net. For example, you cannot select a net pin that is part of one net and a long line that is part of another net.
- If a connection does not exist between specified objects that connection is not routed, and an error message appears in the history area. If enhanced routing is enabled, the FPGA Editor attempts to autoroute between the two selected routing resources. Enhanced routing is described in the Main Window Properties section.
- When you specify objects to route, consider the direction of current flow through the switches connecting the two objects. You can route from source to load or from load to source, but you cannot mix the two directions during a single Route command run.
- When you select an unused net pin or pinwire for a connection, it is added to the net you are routing.
- Manual routing only routes the specified connections. All other unrouted connections on the applicable net remain unrouted, unless enhanced routing is enabled.
- The Stub Trimming option displays only those portions of routing resources, for example, long lines and local lines, actually used by routes. If you disable Stub Trimming, the full routing resources taken up by the routes are displayed. For manual routing, disable Stub Trimming to determine which routing resources are available. Stub Trimming is described in the Main Window Properties section.
- Partially routed nets that do not terminate at pins (antennas) are unrouted by the Autoroute -all command if you do not lock the net. Unlocked antennas are also removed if you run PAR on your design file.
- Any segment added to a net with manual routing is locked or unlocked, depending on the net's lock status.
- You may want to specify Auto Highlight if you are manually routing a very dense design.
- You must select objects in the order in which you want them routed. When you select the objects, consider that connections are routed one by one from each selected object to the next. For example, if you select three objects in the order A, B, C, you are indicating that you want to route A to B, then route B to C.
Switch Boxes in Manual Routing
Switch boxes are located at the junctions of horizontal and vertical local lines and can connect local lines. The switch boxes have certain allowable matrices for pin connections. Allowable routes vary, depending on the location of the switch box on the chip. For example, switch boxes on the perimeter of the chip have fewer pins, so the routing matrices are different from those on switch boxes inside the perimeter.
To see the allowable paths for any pin in a given switch box, select the pin. To deselect the pin and clear the paths from your screen, click in an empty part of the screen. Click the Shift key and the left mouse button to select multiple switch box pins.
To route a connection through a switch box, select the local lines leading to the pins you want to connect. A bank shot is a way of indirectly connecting two switch box pins that cannot be connected directly. If you want to route a bank shot through a switch box, select in the correct order the local lines leading to all of the pins you want to connect.
Routing Through a Logic Block
A type of route called a route-through can pass through an occupied or an unoccupied CLB site. A route-through provides routing resources that would otherwise be unavailable.
Use Ctrl+Shift+left mouse button on a pin to highlight all available route-through paths for the pin at that site or component.
You can manually perform a route-through as shown in the following steps for a a CLB in an XC4000 design.
- During manual routing, select input pin C1, C2, C3, or C4 on the CLB site (vacant or occupied) you want to route through.
You can also select the pinwire associated with the pin.
- Select output pin XQ or YQ on the same site.
You can also select the pinwire associated with the pin.
- Select Tools Route Manual Route.
The net is routed through the site or component.
An error message appears if the route-through is not possible because of interfering logic in the CLB or pre-existing signals on the route-through pins.
In the FPGA Editor, a route-through appears as a wide line connecting an input to an output pin. The line has the same width and color as other route line segments and is contained in the route graphics layer. If a component occupies the route-through site, the route-through line segment is displayed on top of the component.
Automatic Routing Option
The Automatic Routing option automatically routes any unrouted nets created as a result of an editing action, such as placing a component, creating a new net, or swapping components. If enabled, Automatic Routing is performed after each Add, Copy, Swap, Autoplace, and Place command.
The Automatic Routing option is included in the main window property sheet, and the default setting is enabled. You can change the default setting by editing your fpga_editor.ini or fpga_editor_user.ini file. See the Initializing the FPGA Editor section of the Customizing the FPGA Editor chapter.
During an editing session, you can toggle the option between enabled and disabled with the following procedure.
- S elect File Main Properties to display the Main Properties property sheet.
- Select Automatic Routing.
- Click OK or Apply.
Unrouting
Unrouting disconnects routed connections for specified objects. The logical connections remain after the unroute. The unrouted routes are replaced with ratsnest lines. You can unroute selected objects or unroute your entire design.
Note: Locked nets cannot be unrouted.
You can unroute the following objects.
- Nets
- Net Pins
- Route Segments
- Macros
- Used local lines, long lines, and pinwires
Unrouting Selected Objects
To unroute selected objects, follow this procedure.
- Select the objects to unroute.
Select any combination of components, nets, net pins, route segments, macros, and used wires in the Array window. Nets and macros are selected by displaying a net or macro list in the List window; a net can also be selected by clicking the Shift key and left mouse button on a route segment. A macro can also be selected by pressing the Ctrl key while selecting a macro component.
- Select Tools Route Unroute.
The objects are unrouted; routed connections are replaced by ratsnest lines.
Unrouting Entire Design
- Select Tools Route Unroute All.
- Select Yes in the confirmation box that appears to unroute all nets.
All routed connections in your design are unrouted except the locked signals and certain macro nets. See the Routing and Unrouting Macros in Your Design section of the Working with Physical Macros chapter.
Unrouting Notes
This section includes additional information on unrouting your design.
- When you unroute a net pin, only the connection to the net pin is unrouted. All other routed connections on the net are retained.
- When you unroute a net, the entire net is unrouted.
- When you unroute a component, each net pin on the component is unrouted.